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| May 1997 NDH8303N Dual N-Channel Enhancement Mode Field Effect Transistor General Description SuperSOTTM-8 N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. Features 3.8 A, 20 V. RDS(ON) = 0.035 @ VGS = 4.5 V RDS(ON) = 0.045 @ VGS = 2.7 V. Proprietary SuperSOTTM-8 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. ____________________________________________________________________________________________ 5 6 7 8 4 3 2 1 Absolute Maximum Ratings T A = 25C unless otherwise noted Symbol VDSS VGSS ID PD TJ,TSTG Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Maximum Power Dissipation (Note 1) (Note 1) NDH8303N 20 8 3.8 15 0.8 -55 to 150 Units V V A W C Operating and Storage Temperature Range THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1) 156 40 C/W C/W (Note 1) (c) 1997 Fairchild Semiconductor Corporation NDH8303N Rev.C ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = 250 A VDS = 16 V, VGS = 0 V TJ = 55oC Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 8 V, VDS = 0 V VGS = -8 V, VDS= 0 V VDS = VGS, ID = 250 A TJ = 125oC Static Drain-Source On-Resistance VGS = 4.5 V, ID = 3.8 A TJ = 125oC VGS = 2.7 V, ID = 3.3 A ID(on) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current VGS = 4.5 V, VDS = 5 V VGS = 2.7 V, VDS = 5 V Forward Transconductance VDS = 5 V, ID = 3.8 A VDS = 10 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 700 370 145 pF pF pF 15 5 15 S 0.4 0.3 0.7 0.45 0.029 0.043 0.036 20 1 10 100 -100 V A A nA nA ON CHARACTERISTICS (Note 2) Gate Threshold Voltage 1 0.8 0.035 0.063 0.045 A V SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 10 V, ID = 3.8 A, VGS = 4.5 V VDD = 5 V, ID = 1 A, VGS = 4.5 V, RGEN = 6 8 22 48 23 19.6 2.5 6.5 15 40 90 40 ns ns ns ns nC nC nC NDH8303N Rev.C ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max 0.67 (Note 2) Units A V DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.67 A 0.65 1.2 P D (t) = R JA(t) T J-TA = T J-TA R JC+RCA(t) = I 2 (t) x RDS(ON ) D TJ Typical RJA for single device operation using the board layout shown below on 4.5"x5" FR-4 PCB in a still air environment: 156oC/W when mounted on a 0.0025 in2 pad of 2oz copper. Scale 1 : 1 on letter size paper. 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%. NDH8303N Rev.C Typical Electrical Characteristics 20 2 V I D , DRAIN-SOURCE CURRENT (A) 16 GS = 4.5V 3.0 2.5 2.0 DRAIN-SOURCE ON-RESISTANCE 1 .8 2.7 R DS(on), NORMALIZED VGS = 2.0V 1 .6 12 1 .4 2.5 2.7 3.0 3.5 4.0 4.5 8 1 .2 1.5 4 1 0 0 0.5 V DS 1 1.5 2 2.5 3 0 .8 0 4 8 12 16 20 I D , DRAIN CURRENT (A) , DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Gate Voltage and Drain Current. 1 .8 2 DRAIN-SOURCE ON-RESISTANCE DRAIN-SOURCE ON-RESISTANCE 1 .6 I D = 3.8A V GS = 4.5V R DS(on), NORMALIZED 1.5 V GS = 4.5 V TJ = 125C R DS(ON) , NORMALIZED 1 .4 25C 1 1 .2 -55C 0.5 1 0 .8 0 .6 -50 -25 0 25 50 75 100 125 150 0 0 4 I D TJ , JUNCTION TEMPERATURE (C) 8 12 , DRAIN CURRENT (A) 16 20 Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Drain Current and Temperature. 15 1.3 VDS = 5V 12 I D , DRAIN CURRENT (A) 125C GATE-SOURCE THRESHOLD VOLTAGE T = -55C J 25C 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 VDS = VGS I D = 250A 9 6 3 0 0 0.5 1 1.5 2 V GS , GATE TO SOURCE VOLTAGE (V) 2.5 V th, NORMALIZED -25 0 25 50 75 100 T , JUNCTION TEMPERATURE (C) J 125 150 Figure 5. Transfer Characteristics. Figure 6. Gate Threshold Variation with Temperature. NDH8303N Rev.C Typical Electrical Characteristics 15 1.15 DRAIN-SOURCE BREAKDOWN VOLTAGE ID = 250A 1.1 I S, REVERSE DRAIN CURRENT (A) 5 1 0 .5 0 .1 VGS =0V TJ = 125C 25C -55C BV DSS , NORMALIZED 1.05 1 0 .0 1 0.95 0 .0 0 1 0.9 -50 -25 0 T J 25 50 75 100 , JUNCTION TEMPERATURE (C) 125 150 0 .0 0 0 1 0 0 .2 0 .4 0.6 0 .8 1 V SD , BODY DIODE FORWARD VOLTAGE (V) 1 .2 Figure 7. Breakdown Voltage Variation with Temperature. Figure 8. Body Diode Forward Voltage Variation with Current and Temperature. 2500 2000 , GATE-SOURCE VOLTAGE (V) 1500 1000 CAPACITANCE (pF) 5 I D = 3.8A 4 VDS = 5V 10V 15V Ciss 500 3 Coss 2 300 200 f = 1 MHz V GS = 0 V V 100 0 .1 0 0 .2 V DS GS Crss 1 0 .5 1 3 5 , DRAIN TO SOURCE VOLTAGE (V) 10 20 0 5 10 15 20 25 Q g , GATE CHARGE (nC) Figure 9. Capacitance Characteristics. Figure 10. Gate Charge Characteristics. VDD t d(on) t on tr 90% t off t d(off) 90% tf V IN D RL V OUT DUT VGS VOUT R GEN 10% 10% INVERTED G 90% S V IN 10% 50% 50% PULSE WIDTH Figure 11. Switching Test Circuit. Figure 12. Switching Waveforms. NDH8303N Rev.C Typical Electrical and Thermal Characteristics 30 30 V DS = 5V , TRANSCONDUCTANCE (SIEMENS) 25 TJ = -55C 25C 10 RD S( ) ON LIM IT 10 0u s 1m s 10 10 ms s 20 I D , DRAIN CURRENT (A) 3 1 0.3 0.1 125C 15 0m 1s 10 10 VGS = 4.5V SINGLE PULSE R J A s DC 5 0.03 0 0 4 I D = See Note 1c g FS T A = 25C 8 12 , DRAIN CURRENT (A) 16 20 0.01 0.1 0.2 0.5 1 2 5 10 VDS , DRAIN-SOURCE VOLTAGE (V) 20 30 Figure 13. Transconductance Variation with Drain Current and Temperature. Figure 14. Maximum Safe Operating Area. 1 TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 0.05 0.02 r(t), NORMALIZED EFFECTIVE 0.1 R JA (t) = r(t) * R JA R JA = See Note 1 P(pk) t1 Single Pulse 0.01 0.01 t2 TJ - T =P *R (t) A JA Duty Cycle, D = t 1 / t 2 0.001 0.0001 0.001 0.01 0.1 t 1 , TIME (sec) 1 10 100 300 Figure 15. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note1. Transient thermal response will change depending on the circuit board design. NDH8303N Rev.C |
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